The invention relates to a monolithic digital semiconductor circuit comprising a plurality of bipolar transistors, wherein a bipolar transistor which serves to provide the current supply is connected via its emitter to a first supply potential and via its base to a second supply potential, and its collector is connected to the emitter or to the base of a bipolar transistor which belongs to the actual digital semiconductor circuit, and wherein moreover the collector of the last mentioned bipolar transistor is connected to a third supply potential.
Monolithic semiconductor circuits of this kind are preferably produced in the ECL-, EFL- or CML techniques, which are normally based upon a p- or n-conducting silicon crystal or a monocrystalline semiconductor layer which has been epitaxially produced from monocrystalline silicon of this kind on an insulating or semiconducting or metallic substrate and which has a flat surface. This is covered with a first doping mask whose doping windows, which pass through to the semiconductor surface, are shaped in accordance with the outlines of the collector zones of the bipolar transistors which are to be produced. This is then used to produce a number of discrete, trough-like collector zones which have the opposite conductivity type to that of the semiconductor crystal. By means of a second redoping process and a second, corresponding doping mask, a base zone is produced within the individual collector zones and an emitter zone is produced within each base zone. The introduction of the dopants which effect the redoping is carried out either by diffusion or by ion implantation. The common production of the bipolar transistors can be accompanied by the production of further elements which may be provided in the integrated semiconductor circuit, for example diodes.
Through the publication "1973 IEEE International Solid State Circuits Conference ISSCC", 73/Feb. 16, pages 168, 169, it is known to accommodate additional transistors which serve to provide the current supply of the individual logic-linking stages of the integrated digital semiconductor circuit in the silicon monocrystal which accommodates the digital semiconductor circuit. These additional transistors are bipolar transistors and are produced in common with the bipolar transistors of the actual digital semiconductor circuit. The connection of each of these current supply transistors is normally carried out in that the first supply potential is fed via an input impedance (which can be formed by the material of the emitter zone or the emitter supply line of the relevant current supply transistor) to the emitter of the current supply transistor. Moreover, the collector of the current supply transistor is directly connected to the emitter or the base of the digital circuit stage(s) which it supplies.
Normally, a digital circuit of this kind comprises several stages so that a conventional design requires a corresponding number of current supply transistors. However, one of the most essential aims in the design of bipolar integrated circuits, in particular stores, is to keep the value of the so-called power-delay product as low as possible. In modern stores this means, in particular, an appropriate design of the decoder as the latter decisively influences the access time, thus the delay, and also the current consumption of the store. Experience has shown that the current consumption component of conventional decoder circuits constitutes between 50 and 90 percent of the overall current consumption of the store. Therefore, it is desirable to achieve a reduction in this respect.
A known realization along these lines is described in the German AS No. 24 61 088, which relates to a logic-linking element having a high operating speed and comprising a plurality of emitter-coupled inverters, each of which contains a first and a second transistor whose emitters are connected to one another, the base of the first transistor being connected to a connection point to which a signal representing a logic input signal can be connected. This arrangement involves considerable advantages in respect of reducing the power loss. However, it is also desirable to achieve one's aim with the lowest possible transit time.